- #2011_01: James Bell, Alan Blankman, Eric Bogatin, Alfred Neves, George Noh, Martin Spadaro; Robust Method for Addressing 12 Gbps Interoperability for High-Loss and Crosstalk-Aggressed Channels
- #2011_01: James Bell, Scott McMorrow, Martin Miller, Alfred Neves; Paper - Developing Unified Methods of 3D Electromagnetic Extraction, System Level Channel Modeling, and Robust Jitter Decomposition in Crosstalk Stressed 10Gbpsec Serial Data Systems
- #2009_01: A. Neves, T. Dagostino; Presentation - Calibration and De-Embedding Techniques In the Frequency Domain
- #2009_02: Y. Shlepnev, A. Neves, T. Dagostino, S. McMorrow; Paper - Measurement-Assisted Electromagnetic Extraction of Interconnect Parameters on Low-Cost FR-4 Boards for 6-20 Gb/sec Applications
- #2009_02: Y. Shlepnev, A. Neves, T. Dagostino, S. McMorrow; Presentation - Measurement-Assisted Electrmagnetic Extraction of Interconnect Parameters on Low-Cost FR-4 Boards for 6-20 Gb/sec Applications
- #2007_01: Johnnie Hancock; Paper - Identifying Sources of Jitter
This paper addresses a new methodology for 12 Gbps interoperability that combines a concerted family of pathological channels, internal eye monitoring, and external EQ simulation tools, providing insight into an EQ optimization strategy that addresses the specific channel’s mix of crosstalk noise, jitter, and channel loss. This also provides a backplane designer the ability to configure a high-loss, crosstalk aggressed system. The method, combining co-simulation channel optimization, a reconfigurable channel platform, and receiver eye monitoring, has two key benefits; the separation of channel eye opening versus un-equalizable Deterministic Jitter (Dj), and the capability to map loss-crosstalk space for a particular SERDES channel pair, a new concept in SERDES interoperability evaluation.The method is described in detail, followed by relevant case examples using hardware specifically designed for this endeavor. Finally, we compare eye monitor results with the original co-simulation, validating the method.
This feature is available only if you are logged in.
This feature is available only if you are logged in.
As serial link speeds increase, systems become more "Stressed". Loss, low probability deterministic jitter, crosstalk aggression from densely packed signal nets, via and connector impedance and associated resonances, and package and power delivery issues all add their own jitter density function, resulting in a net jitter picture that is inherently complicated. This paper represents a rigorous and practical crosstalk analysis of 10Gbps and higher serial data transmission systems, which will begin at pre-layout 3D EM extraction, continue with the material parameters identification and post-layout analysis and end with direct jitter measurement and separation. We believe this is one of the timeliest of topics in signal integrity at the present time.
This feature is available only if you are logged in.
This feature is available only if you are logged in.
Design of interconnects on PCBs for 6-10 Gb/s data rates requires electromagnetic models from DC up to 20 GHz. Manufacturers of low-cost FR-4 PCBs typically provide values for dielectric constant and loss tangent either at one frequency or without specifying frequency value at all, that is not acceptable for the broad-band models. A simple and practical methodology to extract frequency-dependent dielectric parameters on the base of correlation of measurements and simulations is proposed. A board with 30 test structures has been built to validate the extraction methodology and to verify possibilities to predict interconnect parameters with the electromagnetic analysis.
This feature is available only if you are logged in.
This feature is available only if you are logged in.
This paper begins with a review of jitter fundamentals including a discussion of the various random jitter (RJ) and deterministic jitter (DJ) components and their possible causes. Using RJ/DJ separation and Bathtub curve analysis is typically the first step in determining if your high-speed system and/or components are comfortably meeting a particular timing budget requirement for reliable data transmission performance. But separation tables and bathtub curve extractions give no indication of the source of jitter. Knowing how to isolate jitter components with time-correlation will enhance your ability to find the root cause so that you can then proceed to "beat down" individual error components one at a time in order to improve reliable system performance.
This feature is available only if you are logged in.