Matthew Burns, Product Marketing Manager–High Speed, Samtec
Mike Gianfagna, VP, Marketing, eSilicon
Tim Horel, Director of Field Applications, eSilicon
Our discussion will focus on PAM4 (pulse amplitude modulation) systems operating at 56 Gigabits per second and beyond. PAM4 is a modulation technique whereby four distinct pulse amplitudes are used to convey the information. PAM4 enables twice the transmission capacity when compared to binary modulation. Because the additional voltage levels in PAM4 reduce the level spacing by a factor of three, PAM4 is more susceptible to noise than a binary digital signal, thus requiring a higher signal- to-noise (SNR) ratio. Consequently, PAM4 is normally used for short-reach applications where a higher SNR can be obtained.
We will explore how this shortcoming can be overcome, resulting in very long-reach signaling with PAM4 encoding over a copper cable to enable next-generation 25.6 and 51.2Tb/s switches, routers and 800G systems. Delivering this capability has two challenges — working silicon that can deliver the required performance and a SerDes test fixture that allows system designers to verify performance in their target application. We will discuss both challenges.
A Practical Method to Model Effective Permittivity and Phase Delay Due to Conductor Surface Roughness
Lambert (Bert) Simonovich, Lamsim Enterprises Inc.
In the GB/s regime, accurate modeling of conductor loss and phase delay is a precursor to successful high-speed serial link designs. In this paper, a practical method to model effective permittivity and phase delay, due to conductor surface roughness, is presented. By obtaining the dielectric and roughness parameters, solely from manufacturers’ data sheets, phase delay and effective permittivity can now be easily predicted. Detailed case studies and several examples test the model`s accuracy.
BER- and COM-Way of Channel-Compliance Evaluation: What are the Sources of Differences?
Cristian Filip, Mentor Graphics
Chuck Ferry, Mentor Graphics
Alfred P. Neves, Wild River Technology
Vladimir Dmitriev-Zdorov, Mentor Graphics
We analyze the computational procedure specified for Channel Operation Margin (COM) and compare it to traditional statistical eye/BER analysis. There are a number of differences between the two approaches, ranging from how they perform channel characterization, to how they consider Tx and Rx noise and apply termination, to the differences between numerical procedures employed to convert given jitter and crosstalk responses into the vertical distribution characterizing eye diagrams and BER. We show that depending on the channel COM may potentially overestimate the effect of crosstalk and, depending on a number of factors, over- or underestimate the effect of transmit jitter, especially when the channel operates at the rate limits. We propose a modification to the COM procedure that eliminates these problems without considerable work increase.
Methods of Improving 3D EM Model Development and Associated Time/Frequency Domain Measurements
Jim Bell and Al Neves, Wild River Technology
Bob Buxton and Jon Martens, Anritsu Company
Josiah Bartlett, Tektronix
Robust Method for Addressing 12 Gbps Interoperability for High-Loss and Crosstalk-Aggressed Channels
James Bell, Wild River Technology
Alfred Neves, Wild River Technology
This paper addresses a new methodology for 12 Gbps interoperability that combines a concerted family of pathological channels, internal eye monitoring, and external EQ simulation tools, providing insight into an EQ optimization strategy that addresses the specific channel’s mix of crosstalk noise, jitter, and channel loss. This also provides a backplane designer the ability to configure a high-loss, crosstalk aggressed system. The method, combining co-simulation channel optimization, a reconfigurable channel platform, and receiver eye monitoring, has two key benefits; the separation of channel eye opening versus un-equalizable Deterministic Jitter (Dj), and the capability to map loss-crosstalk space for a particular SERDES channel pair, a new concept in SERDES interoperability evaluation. The method is described in detail, followed by relevant case examples using hardware specifically designed for this endeavor. Finally, we compare eye monitor results with the original co-simulation, validating the method.
Developing Unified Methods of 3D Electromagnetic Extraction, System Level Channel Modeling, and Robust Jitter Decomposition in Crosstalk Stressed 10Gbpsec Serial Data Systems
As serial link speeds increase, systems become more “Stressed”. Loss, low probability deterministic jitter, crosstalk aggression from densely packed signal nets, via and connector impedance and associated resonances, and package and power delivery issues all add their own jitter density function, resulting in a net jitter picture that is inherently complicated. This paper represents a rigorous and practical crosstalk analysis of 10Gbps and higher serial data transmission systems, which will begin at pre-layout 3D EM extraction, continue with the material parameters identification and post-layout analysis and end with direct jitter measurement and separation. We believe this is one of the timeliest of topics in signal integrity at the present time.
Full-wave time domain modeling Full-wave time domain modeling of interconnects
Frequency-domain 3D Electromagnetic modeling approaches always have the potentialFrequency-domain 3D Electromagnetic modeling approaches always have the potentialf or causality and passivity violation issues, especially when applied to greater than 20Gbsec data rates applications: initial applications for 3D Electromagnetic modeling methods were only used in low bandwidth frequency-domain microwave designs.A new and inherently passive and causal time-domain oriented approach for 3D Electromagnetic modeling is introduced in detail. The authors show specific advantages of this approach for baseband-NRZ very high-speed backplanes, interconnects, and general board design for digital systems. Selecting the correct loss model will be included and the model results will be compared to actual measurements to 20 GHz using a testboard specifically designed for this presentation.
Practical identification of dispersive dielectric models with generalized modal S-parameters for analysis of interconnects in 6-100 Gb/s applications
A novel method for extraction of dispersive dielectric parameters to 50 GHz is proposed. The method doesn’t require advanced de-embedding, and is based on correlation of measured and simulated generalized modal S-parameters of a line segment. First, VNA measurements for two line segments are made and used to compute generalized S-parameters of a difference segment. Second, 3D full-wave model of the difference segment with conductor model with roughness is used to identify the dielectric properties. We finalize the paper with the derivation of dielectric models for low-cost FR4-type and for expensive low-loss high-frequency materials. The advanced models can be used for practical electromagnetic analysis of interconnects for the 6-100 Gb/s realm..
Measurement-Assisted Electromagnetic Extraction of Interconnect Parameters on Low-Cost FR-4 Boards for 6-20 Gb/sec Applications
Design of interconnects on PCBs for 6-10 Gb/s data rates requires electromagnetic models from DC up to 20 GHz. Manufacturers of low-cost FR-4 PCBs typically provide values for dielectric constant and loss tangent either at one frequency or without specifying frequency value at all, that is not acceptable for the broad-band models. A simple and practical methodology to extract frequency-dependent dielectric parameters on the base of correlation of measurements and simulations is proposed. A board with 30 test structures has been built to validate the extraction methodology and to verify possibilities to predict interconnect parameters with the electromagnetic analysis
Alibration and De-Embedding Techniques in the Frequency Domain
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